Transitioning a computing platform to a low power system state
US7849334B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2006 |
| Grant date | Dec 7, 2010 |
| Priority date | — |
| Expiry date | Mar 7, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/3203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method which includes initiating a power management policy based on a processing element for a computing platform entering a given power state. The power management policy includes a determination as to whether an input/output (I/O) controller and a memory controller for the computing platform are substantially quiescent. The computing platform may then be transitioned to a low power system state from a run power system state based on a determination that both the I/O controller and the memory controller are substantially quiescent and an indication that the computing platform is capable of entering the low power system state. According to this method, the low power system state includes entering one or more devices responsive to the computing platform in a power level adequate to retain a configuration state that enables the one or more devices to transition back to the run power system state in a manner that is substantially transparent to an operating system for the computing platform. Other implementations and examples are also described in this disclosure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.