Method of fabricating a trench gate MOSFET for maximizing breakdown voltage
US7851300B2 · kind B2 · utility
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Key dates
| Filing date | Dec 28, 2008 |
| Grant date | Dec 14, 2010 |
| Priority date | — |
| Expiry date | Feb 27, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/142
Abstract
A trench gate MOSFET and a fabrication method thereof includes forming a first epitaxial layer over a semiconductor substrate, and then forming a second epitaxial layer formed over the first epitaxial layer, and then forming a body region over the second conductive type second epitaxial layer, and then forming a circular cross-section in a portion of the body region by performing an ion implantation process on the body region such that a bottom area thereof has a circular cross-section.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.