Fabrication of compact opto-electronic component packages
US7851818B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 23, 2008 |
| Grant date | Dec 14, 2010 |
| Priority date | — |
| Expiry date | Dec 6, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/8506
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer-level method of fabricating an opto-electronic component package, in which the opto-electronic component is mounted to a semiconductor wafer having first and second surfaces on opposite sides of the wafer. The method includes etching vias in the first surface of the semiconductor wafer. The first surface and surfaces in the vias are metallized, and the metal is structured to define a thermal pad and to define the anode and cathode contact pads. A carrier wafer is attached on the side of the semiconductor wafer having the first surface, and the semiconductor wafer is thinned from its second surface to expose the metallization in the vias. Metal is provided on the second surface, and the metal is structured to define a die attach pad and additional anode and cathode pads for the opto-electronic component. The opto-electronic component is mounted on the die attach pad and a protective cover is formed over the opto-electronic component.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.