High speed conditional back bias virtual ground restoration circuit
US7852118B2 · kind B2 · utility
3Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2009 |
| Grant date | Dec 14, 2010 |
| Priority date | — |
| Expiry date | Dec 2, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/356017
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A conditional level shifter circuit is used to substantially eliminate sneak current from occurring in an integrated circuit device having two or more logic circuit modules in different voltage domains. Sneak current is caused when a signal between the two or more logic circuit modules in different voltage domains is at logic “0” and one of the logic circuit modules is biased at a voltage level above the true ground, VSS, of the integrated circuit device. The conditional ground restoration circuit shifts the virtual ground logic “0” to the true ground level. This eliminates sneak current and logic level corruption.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.