Reset-free comparator with built-in reference
US7852123B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 2006 |
| Grant date | Dec 14, 2010 |
| Priority date | — |
| Expiry date | Apr 17, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/2481
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A comparator circuit includes a bias stage, a first current source, a second current source, and a comparator stage. The bias stage includes a first input, a second input, an output that generates a bias voltage, and a first load, wherein differential reference voltages are applied to the first and second inputs. The first current source generates a bias current based on the bias voltage and inputs the bias current to the bias stage. The second current source generates the bias current based on the bias voltage. The comparator stage communicates with the second current source and includes a first input, a second input, and a second load, wherein differential input voltages are applied to the first and second inputs of the comparator stage. The comparator circuit compares the differential input voltages to the differential reference voltages based on the bias current, the first load, and the second load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.