Negative capacity circuit for high frequencies applications
US7852174B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 16, 2007 |
| Grant date | Dec 14, 2010 |
| Priority date | — |
| Expiry date | May 29, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H11/481
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A negative capacitances circuit includes first and second branches connected between a first reference voltage and a second reference voltage. The first branch includes, in series, a first biasing resistor, a first diode, a first bipolar transistor, and a first current source. The second branch includes, in series, a second biasing resistor, a second diode, a second bipolar transistor, and a second current source. The first transistor has a base coupled to a collector of the second transistor and to one input, and the second transistor has a base coupled to a collector of the first transistor and to another input. A capacitor is connected between the emitter of said first transistor and the emitter of said second transistor. A linearization resistor is coupled in parallel between the two emitters of said first and said second transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.