Decimation filter
US7856464B2 · kind B2 · utility
2Cited by
42References
35Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 16, 2006 |
| Grant date | Dec 21, 2010 |
| Priority date | — |
| Expiry date | Apr 18, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H17/0685
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system and method for decimating a digital signal is disclosed. The system includes an input to receive digital data, a control input to receive a desired decimation rate, and an integrator stage responsive to the input. The system also includes a variable rate down sampling module responsive to the integrator stage and a differentiator stage responsive to the variable rate down sampling module. The down sampling module has a decimation rate that is dynamically adjustable based on the desired decimation rate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.