Non-destructive validation of semiconductor devices
US7859276B1 · kind B1 · utility
4Cited by
6References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 2, 2008 |
| Grant date | Dec 28, 2010 |
| Priority date | — |
| Expiry date | Mar 5, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2207/30148
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A process for performing non-destructive monitoring of a semiconductor device that permits detection of additional circuitry that is not part of the original, intended design. This permits verification that additional circuitry, for example malicious circuitry, has not been added to the semiconductor device. In one embodiment, the monitoring is performed at the die level before the die is packaged into a complete semiconductor device. The monitoring is non-destructive so that the semiconductor die is not destroyed during the monitoring process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.