Memory device with multiple capacitor types

US7859890B2 · kind B2 · utility

Assignee

• Qimonda AG · DE

Inventor

• Andreas Thies · Tirschenreuth, DE

Key dates

• Filing date: Aug 28, 2008
• Grant date: Dec 28, 2010
• Expiry date: Jun 19, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/50

Abstract

An integrated circuit includes a memory array portion and a support circuitry portion arranged on a semiconductor substrate. An insulative layer is formed on the semiconductor substrate. Data storage capacitors are located in the memory array portion and extending through the insulative layer. Non-data storage capacitors are located in the support circuitry portion and terminating above the insulative layer.