Hardware verification batch computing farm simulator
US7860700B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2007 |
| Grant date | Dec 28, 2010 |
| Priority date | — |
| Expiry date | Feb 5, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31707
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The exemplary embodiments provide a computer implemented method, apparatus, and computer usable program code for calculating the expected behavior of a group of hardware verification test cases. Batch simulation parameters are configured. A test case is submitted for evaluation. Historical performance data for test cases associated with the submitted test case is gathered. A set of performance statistics for the submitted test case is generated based on the historical performance data and the configured batch simulation parameters. A set of values for the submitted test is generated based on the generated performance statistics for the submitted test case and the historical performance data. The generated set of values and the generated set of performance statistics for the submitted test case are displayed to a user.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.