Processor instruction including option bits encoding which instructions of an instruction packet to execute
US7861061B2 · kind B2 · utility
2Cited by
13References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 23, 2003 |
| Grant date | Dec 28, 2010 |
| Priority date | — |
| Expiry date | Feb 25, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3853
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor and a method for executing VLIW instructions by first fetching a VLIW instruction and then identifying from option bits encoded in a first one of the instructions within the fetched VLIW instruction packet which, if any, of the remaining instructions within the VLIW instruction are to be executed in the same execution cycle as the first instruction. Finally, executing the first instruction and any remaining instructions identified from the encoded option bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.