Integrated circuits utilizing amorphous oxides

US7863611B2 · kind B2 · utility

Assignees

• Canon Kabushiki Kaisha · JP
• Tokyo Institute of Technology · JP

Inventors

• Katsumi Abe · Tokyo, JP
• Hideo Hosono · Yokohama, JP
• Toshio Kamiya · Yokohama, JP
• Kenji Nomura · Amagasaki, JP

Key dates

• Filing date: Nov 9, 2005
• Grant date: Jan 4, 2011
• Expiry date: Mar 1, 2027

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6755

Abstract

Semiconductor devices and circuits with use of transparent oxide film are provided. The semiconductor device having a P-type region and an N-type region, wherein amorphous oxides with electron carrier concentration less than 1018/cm3 is used for the N-type region.