Apparatus and method for use with quadrature signals
US7863953B2 · kind B2 · utility
3Cited by
0References
16Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 23, 2008 |
| Grant date | Jan 4, 2011 |
| Priority date | — |
| Expiry date | Dec 23, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H19/008
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide a current mode logic circuit, comprising first and second differential switching stages, each stage arranged being arranged to receive a plurality of clock signals, such that the first and second differential switching stages respond to a combination of the plurality of clock signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.