Disk clock system with up-sampler to generate frequency offset
US7864464B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 29, 2009 |
| Grant date | Jan 4, 2011 |
| Priority date | — |
| Expiry date | Dec 29, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B2220/2516
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A system reads data from a magnetic storage media. A read head reads data from the magnetic storage media and produce an analog signal. A variable gain amplifier amplifies the analog signal. An offset adjust module substantially centers the amplified analog signal to a midscale. A Magneto Resistive Asymmetry (MRA) correction module MRA corrects the amplified analog signal. A Continuous Time Filter (CTF) compensation module processes the amplified analog signal. An Analog to Digital Converter (ADC) samples the amplified analog signal based upon a control signal to produce a digital signal. A Disk Lock Clock (DLC) system produces the control signal to the ADC. The control signal is representative of a frequency offset caused by at least one servo wedge rate error. A Finite Impulse Response (FIR) filter module filters the digital signal. A sequence detector processes the digital signal and detects a bit sequence from the digital signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.