Calibration of read/write memory access via advanced memory buffer
US7865660B2 · kind B2 · utility
6Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2007 |
| Grant date | Jan 4, 2011 |
| Priority date | — |
| Expiry date | Mar 17, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4239
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatuses to calibrate read/write memory accesses through data buses of different lengths via advanced memory buffers. One embodiment includes an advanced memory buffer (AMB) having: a plurality of ports to interface respectively with a plurality of data buses; a port to interface with a common clock bus for the plurality of data buses; and an adjustable circuit coupled with the plurality of ports to level delays on the plurality of data buses. In one embodiment, the data buses have different wire lengths between the dynamic random access memory (DRAM) memory chips and the advanced memory buffer (AMB).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.