SOI on package hypersensitive sensor
US7868362B2 · kind B2 · utility
10Cited by
33References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2008 |
| Grant date | Jan 11, 2011 |
| Priority date | — |
| Expiry date | May 5, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6744
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A hypersensitive semiconductor die structure is disclosed, in which flip-chip packaging is used in conjunction with a modified SOI die in which a thick silicon support substrate has been removed to increase sensitivity of the sensing device. Rather than being located beneath layers of interconnects and dielectric, the disclosed structure places the sensing devices close to the surface, more closely exposed to the environment in which sensing is to occur. The structure also allows for the placement of sensing films on nearer to the sensing devices and/or an oxide layer overlying the sensing devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.