N-way mode content addressable memory array
US7869238B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 10, 2008 |
| Grant date | Jan 11, 2011 |
| Priority date | — |
| Expiry date | Nov 30, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C15/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An N-way mode CAM (content addressable memory) array includes M rows that each contain N subwords. Each of the N subwords has a respective mode cell. Additionally, a mode input bus is coupled to each mode cell of each of the N subwords, and a data input bus is coupled to each of the M rows. The mode input bus and the data input bus can uniquely identify as a match a single subword or a plurality of subwords in one of the M rows during a search operation. The N-way mode CAM further includes a row address encoder/generator coupled to each of the M rows, and an address output bus coupled to each of the row address encoder/generators. The mode input bus is also coupled to each of the row address encoder/generators. A uniquely identified single subword address may be outputted on the address output bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.