Patent · US Active

Load balancing for a system of cryptographic processors

US7870395B2 · kind B2 · utility

1Cited by

22References

11Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Thomas J. Dewkett · Staatsburg, US
Camil Fayad · Poughkeepsie, US
John K. Li · Woodstock, US
Siegfried Sutter · Eppelheim, DE
Phil C. Yeh · Poughkeepsie, US

Key dates

Filing date	Oct 20, 2006
Grant date	Jan 11, 2011
Priority date	—
Expiry date	Apr 8, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/5083
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In an array of groups of cryptographic processors, the processors in each group operate together but are securely connected through an external shared memory. The processors in each group include cryptographic engines capable of operating in a pipelined fashion. Instructions in the form of request blocks are supplied to the array in a balanced fashion to assure that the processors are occupied processing instructions.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.