System for using partitioned masks to build a chip

US7870531B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Subhrajit Bhattacharya · White Plains, US
• John Darringer · Mahopac, US
• Daniel L. Ostapko · Mahopac, US

Key dates

• Filing date: May 9, 2008
• Grant date: Jan 11, 2011
• Expiry date: Apr 1, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/10

Abstract

A mask reuse methodology process in which the soft logic is implemented with a generic array type cell structure mask and a custom blocking mask. A system is provided comprising a mask set having a plurality of reusable masks corresponding to a plurality of hard intellectual property (IP) components; a generic array type cell mask; and a custom blocking mask that includes blocking regions that positionally correspond with a set of IP components printed on a die.