Optimization of thread wake up for shared processor partitions
US7870551B2 · kind B2 · utility
7Cited by
17References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 18, 2006 |
| Grant date | Jan 11, 2011 |
| Priority date | — |
| Expiry date | Oct 22, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5077
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mechanism is provided for biasing placement of a software thread on a currently idle and dispatched processor. The operating system starts with the last logical processor on which the software thread ran and determines whether that processor is idle and dispatched and considers each logical processor until a currently dispatched and idle logical processor is found. If a currently dispatched and idle logical processor is not found, then the operating system biases placing the software thread on an idle logical processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.