Generating an integrated circuit identifier
US7871832B2 · kind B2 · utility
3Cited by
3References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 23, 2005 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Aug 24, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The generation of a chip identifier supporting at least one integrated circuit, which includes providing a cutout of least one conductive path by cutting the chip, the position of the cutting line relative to the chip conditioning the identifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.