Shift register circuit and display apparatus using the same
US7872629B2 · kind B2 · utility
2Cited by
5References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2006 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Oct 15, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/021
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register circuit which stably operates with low electric power consumption and can realize a long life. In the shift register circuit constructed by connecting a plurality of fundamental circuits in each of which fundamental clocks of three phases are inputted to input terminals and is constructed by a gate line driving circuit, a timing control circuit, and a holding device control circuit, each of the gate line driving circuit and the timing control circuit has charging devices and holding devices. A node is stabilized by the timing control circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.