Image processing apparatus and image forming apparatus
US7872766B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 2006 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Nov 17, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03G15/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An FPGA functions as an activation mode setting circuit for loading activation data stored on a PROM into a circuit setting memory and setting an activation mode when activating the CPU. The FPGA outputs an activation mode setting signal to the CPU, and the CPU is activated in the set activation mode. After the CPU is activated, it follows predetermined processing steps, and performs a control operation to load the circuit setting data stored in a storage section into the circuit setting memory. Thus, the FPGA is constructed as a circuit having a desired function, and also constructed as an activation mode setting circuit when activating the CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.