Power level balance of frequency converters connected in parallel
US7872885B2 · kind B2 · utility
5Cited by
9References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2007 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Jun 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/6871
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A method and a parallel connection arrangement for equalizing the output powers of power converter units (INU11, INU12), in which power converter units is a semiconductor switch bridge controlled with pulse width modulation, andin which is a control unit arrangement (CU1, CU2) for forming control pulses, with which the semiconductor switches are controlled. The control unit arrangement delays the falling edge of the control pulses of at least one semiconductor switch of at least one power converter unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.