Methods for coordinating access to memory from at least two cryptography secure processing units
US7873830B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2006 |
| Grant date | Jan 18, 2011 |
| Priority date | — |
| Expiry date | Oct 31, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Electronic circuit chips which include cryptography functions are arranged in multichip configurations through the utilization of a shared external memory. Security of the chips is preserved via a handshaking protocol which permits each chip to access limited portions of the memory as defined in a way that preserves the same high security level as the tamper proof chips themselves. The chips may be operated to work on different tasks or to work on the same task thus providing a mechanism for trading off speed versus redundancy where desired.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.