Bistable resistance value acquisition device, manufacturing method thereof, metal oxide thin film, and manufacturing method thereof
US7875872B2 · kind B2 · utility
1Cited by
4References
1Claims
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Key dates
| Filing date | Feb 24, 2010 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Feb 24, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A ferroelectric layer (104) is sandwiched between a lower electrode layer (103) and an upper electrode (105). When a predetermined voltage (DC or pulse) is applied between the lower electrode layer (103) and the upper electrode (105) to change the resistance value of the ferroelectric layer (104) to switch a stable high resistance mode and low resistance mode, a memory operation is obtained. A read can easily be done by reading a current value when a predetermined voltage is applied to the upper electrode (105).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.