Patent · US Active

Memory device

US7875985B2 · kind B2 · utility

16Cited by
7References
24Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 22, 2006
Grant dateJan 25, 2011
Priority date
Expiry dateJan 2, 2028

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/181
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A memory device comprising at least one memory stack of stacked memory dies which are staggered with respect to each other,

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.