Control circuit and method for a power converter
US7876075B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 27, 2010 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Apr 27, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02M3/156
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A control circuit and control method for a power converter detects change of the output voltage of the converter, and performs the time-optimal control function when the change exceeds the default value. According to the voltage slew rate detected at the time of the change exceeding the default value, a time interval T1 from the change exceeding the default value being detected to the current of the inductor rising to be the same as the output current of the converter is estimated, and the time intervals T2 and T3 are figured out based on the time interval T1. The parasitic resistance of the output capacitor of the converter is taken into account during estimating process such that even if the output capacitor has larger parasitic resistance, the output voltage can be back to the steady state value accurately to avoid the time-optimal control being triggered repeatedly.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.