Calibration circuit and method for A/D converter
US7876250B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 27, 2007 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Nov 20, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/414
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog to digital conversion circuit comprises a first digital noise cancellation filter (16) configured to provide a signal to cancel quantization noise from an analog to digital converted output signal. In a calibration phase a second digital noise cancellation filter (26) is has an input coupled to an input of the first digital noise cancellation filter (16). Mutually different sets of at least one-filter coefficients are programmed in the first and second digital noise canceling filters (16, 26). A difference is computed of averaged size indications of digital output signals derived using signals from the first and second digital noise cancellation filters (16, 26) using the same input signal. Updates of the sets of at least one filter coefficients are adapted dependent on the difference between the averaged size indications.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.