Network element clocking accuracy and stability monitoring over a packet-switched network
US7876792B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2008 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Mar 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/14
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Various exemplary embodiments include a method and related system and monitoring entity including one or more of the following: generating timing information at a master node in a packet-switched network, the timing information specifying a value of a master clock; communicating the timing information from the master node to a plurality of slave nodes over a first plurality of time-division multiplexing (TDM) pseudowires; running a digital phase-locked loop on each slave node to synchronize each slave node to the master clock, wherein each digital phase-locked loop outputs a frequency at which the respective slave node is operating; sending the frequency outputted by each digital phase-locked loop to a monitoring entity over a second plurality of TDM pseudowires; utilizing the outputted frequencies at the monitoring entity to identify all slave nodes that are experiencing timing problems; and implementing a remedial measure for all slave nodes that are experiencing timing problems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.