Enforcement of cache coherency policies using process synchronization services
US7877549B1 · kind B1 · utility
9Cited by
5References
37Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2007 |
| Grant date | Jan 25, 2011 |
| Priority date | — |
| Expiry date | Sep 14, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0837
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In general, this disclosure describes techniques of ensuring cache coherency in a multi-processor computing system. More specifically, a relaxed coherency mechanism is described that provides the appearance of strong coherency and consistency to correctly written software executing on the multi-processor system. The techniques, as described herein, combine software synchronization instructions with certain hardware-implemented instructions to ensure cache coherency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.