Patent · US Active

Increased switching cycle resistive memory element

US7881092B2 · kind B2 · utility

3Cited by

1References

27Claims

0Family size

Assignee

Rising Silicon, Inc. · US

Inventor

Klaus-Dieter Ufert · Unterschleißheim, DE

Key dates

Filing date	Jul 24, 2007
Grant date	Feb 1, 2011
Priority date	—
Expiry date	Feb 3, 2028

Classification

Technology area (CPC G)Physics
CPC primaryG11C2213/79
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated circuit including a resistive memory element and a method of manufacturing the integrated circuit are described. The method of manufacturing the integrated circuit includes depositing a switching layer material and intentionally forming inhomogeneously distributed defects within the switching layer material to increase a number of switching cycles of the resistive memory element. The resistive memory element includes a switching layer that selectively switches between a low resistance state and a high resistance state. The switching layer contains intentionally formed defects that increase the number of switching cycles of the switching layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.