Nonvolatile memory devices that include a write circuit that writes data over multiple write periods using pulses whose peaks do not coincide with each other
US7881101B2 · kind B2 · utility
1Cited by
3References
20Claims
0Family size
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Key dates
| Filing date | Jul 24, 2008 |
| Grant date | Feb 1, 2011 |
| Priority date | — |
| Expiry date | Feb 13, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5622
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Nonvolatile memory devices include a plurality of nonvolatile memory cells and a write circuit that is operable to write data to the nonvolatile memory cells over a plurality of consecutive division write periods by generating a plurality of write pulses whose peaks do not coincide with one another to the nonvolatile memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.