Modeling silicon-on-insulator stress effects
US7882452B2 · kind B2 · utility
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3References
19Claims
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Key dates
| Filing date | Aug 30, 2007 |
| Grant date | Feb 1, 2011 |
| Priority date | — |
| Expiry date | Apr 3, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for modeling silicon-on-insulator shallow trench isolation stress effect is described. The method includes creating instance parameters that define dimensions of a body-tie enclosure of gate and gate-end. The instance parameters are added to a netlist. The netlist and a lookup table are used to generate a mobility multiplier. The mobility multiplier is added to the netlist and a circuit simulation program runs the netlist having the instance parameters and the mobility multiplier.
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