Integration of capacitive elements in the form of perovskite ceramic
US7883906B2 · kind B2 · utility
1Cited by
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15Claims
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Key dates
| Filing date | Mar 3, 2010 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | Mar 3, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/692
Abstract
The use of a conductive bidimensional perovskite as an interface between a silicon, metal, or amorphous oxide substrate and an insulating perovskite deposited by epitaxy, as well as an integrated circuit and its manufacturing process comprising a layer of an insulating perovskite deposited by epitaxy to form the dielectric of capacitive elements having at least an electrode formed of a conductive bidimensional perovskite forming an interface between said dielectric and an underlying silicon, metal, or amorphous oxide substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.