Semiconductor device suitable for a stacked structure
US7884459B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2008 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | Dec 31, 2028 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is provided that forms a three-dimensional semiconductor device having semiconductor devices stacked on one another. In this semiconductor device, a hole is formed in a silicon semiconductor substrate that has an integrated circuit unit and an electrode pad formed on a principal surface on the outer side. The hole is formed by etching, with the electrode pad serving as an etching stopper layer. An embedded electrode is formed in the hole. This embedded electrode serves to electrically lead the electrode pad to the principal surface on the bottom side of the silicon semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.