Patent · US Active

Integrated circuit, system and method including a performance test mode

US7884635B2 · kind B2 · utility

0Cited by
2References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 19, 2008
Grant dateFeb 8, 2011
Priority date—
Expiry dateJan 29, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/318536
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

An integrated circuit includes N configurable cells each including one functional input, one output, one propagation input and one output. The circuit includes a functional mode in which the N configurable cells are coupled by their functional input and their output to logic blocks with which they cooperate to form at least one logic circuit. The disclosed circuit also includes a test mode in which the N configurable cells are coupled by their propagation input and their output to the logic blocks and in which the output of the Nth configurable cell is coupled to a functional input of the first logic block to form an oscillator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.