Non-volatile electromechanical configuration bit array
US7885103B2 · kind B2 · utility
4Cited by
7References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 22, 2005 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | Apr 6, 2027 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/943
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A configuration bit array including a hybrid electromechanical and semiconductor memory cell, and circuitry for addressing and controlling read, write, and erase accesses of the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.