Mechanism for implementing thread synchronization in a priority-correct, low-memory safe manner
US7886300B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 26, 2006 |
| Grant date | Feb 8, 2011 |
| Priority date | — |
| Expiry date | Dec 9, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mechanism is disclosed for implementing fast locking in a multi-threaded system. This mechanism enables fast locking to be performed even on an operating system platform that does not allow one thread to assign ownership of a lock on a mutex to another thread. In addition, the mechanism performs locking in a manner that ensures priority correctness and is low-memory safe. In one implementation, the priority correctness is achieved by using operating system mutexes to implement locking, and the low-memory safe aspect is achieved by pre-allocating a memory section to each thread. This pre-allocated memory section ensures that a thread will have sufficient memory to obtain a lock, even when a system is in a low-memory state. With this mechanism, it is possible to implement locking in a safe and efficient manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.