Memory devices and methods of forming and operating the same
US7888731B2 · kind B2 · utility
43Cited by
0References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 6, 2009 |
| Grant date | Feb 15, 2011 |
| Priority date | — |
| Expiry date | Apr 6, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A memory device, including a first ground selection transistor, a first string selection transistor, and first memory cell transistors disposed in series between the first ground selection transistor and the first string selection transistor, wherein the first ground selection transistor and the first memory cell transistors have a same structure. A method of programming the memory device may include programming the ground selection transistor before programming the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.