Semiconductor device
US7888795B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2010 |
| Grant date | Feb 15, 2011 |
| Priority date | — |
| Expiry date | Jun 7, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There is provided a semiconductor device which makes equalization of wirings between address system chips easy and reduce the influence of crosstalk noise and capacitive coupling noise among data system wirings for connecting the chips. There are mounted, on a module board, a plurality of stacked memory chips which a data processor chip simultaneously accesses. Address system bonding pads to which a plurality of memory chips correspond are commonly coupled by a wire to a bonding lead at one end of the module board wiring whose other end is coupled by a wire to an address system bonding pads of the data processor. Data system bonding pads of the data processor chip are individually coupled to data system bonding pads of the memory chip. With respect to an arrangement of the plurality of data system bonding pads of the data processor chip, an arrangement of the data system bonding pads to which the memory chip, coupled by the data system wiring, corresponds is made such that memory chips are disposed in an alternating sequence.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.