Ceramic capacitor
US7889509B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2006 |
| Grant date | Feb 15, 2011 |
| Priority date | — |
| Expiry date | Mar 26, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10712
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A circuit board (10, 10″, 10′″) comprising: a board core (11) having a main core surface (12) and a rear core surface (13); a ceramic capacitor (101, 101′, 101″, 101′″, 101″″, 101″″′, 101″″″) having a main capacitor surface (102) and a rear capacitor surface (103), having a structure in which a first inner electrode layer (141) and a second inner electrode layer (142) are alternately stacked with a ceramic dielectric layer (105) interposed therebetween, and having a plurality of capacitor function units (107, 108) being electrically independent from each other, the ceramic capacitor (101, 101′, 101″, 101′″, 101″″, 101″″′, 101″″″) being buried in the board core (11) in a state where the main core surface (12) and the main capacitor surface (102) are directed in a same direction; and a buildup layer (31) having a structure in which an interlayer insulating layer (33, 35) and a conductor layer (42) are alternately stacked on the main core surface (12) and the main capacitor surface (102) and having a semiconductor integrated circuit device mounting region (23, 51, 52) for mounting a semiconductor integrated circuit device (21, 53, 54) having a plurality of processor cores (24, 25) on …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.