Direct digital frequency synthesizer with phase error correction, method therefor, and receiver using same
US7889812B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 2006 |
| Grant date | Feb 15, 2011 |
| Priority date | — |
| Expiry date | Nov 24, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/0342
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A receiver (1000) includes a direct digital frequency synthesizer (DDFS) (700) and first (1040) and second (1042) mixers. The DDFS (700) has a first output for providing a first local oscillator signal, and a second output for providing a second local oscillator signal offset from a quadrature relationship with the first local oscillator signal by a phase offset. The first mixer (1040) has a first input for receiving a radio frequency (RF) signal, a second input for receiving the first local oscillator signal, and an output for providing an in-phase signal at another frequency. The second mixer (1042) has a first input for receiving the RF signal, a second input for receiving the second local oscillator signal, and an output for providing a quadrature signal at the other frequency. The DDFS (700) may be implemented using first (702) and second (704) memories storing portions of a sinusoidal waveform and extra memories (706, 708) supporting the phase offset.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.