System and method for dual-ported flash memory
US7890690B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2007 |
| Grant date | Feb 15, 2011 |
| Priority date | — |
| Expiry date | Mar 30, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1075
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for emulating a dual-port I2C device includes monitoring a bus for I2C traffic. A system receives an I2C interrupt on the bus. The system determines whether the received I2C interrupt is one of either a hardware interrupt or a software interrupt. In the event the received I2C interrupt is a hardware interrupt, the system responds to the hardware interrupt, and accesses a flash memory for read/write operation based on the hardware interrupt. In the event the received I2C interrupt is a software interrupt, the system responds to the software interrupt, and accesses a flash memory for read/write operation based on the software interrupt.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.