Patent · US Active

Method and apparatus for improved memory reliability, availability and serviceability

US7890811B2 · kind B2 · utility

12Cited by
1References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJun 29, 2007
Grant dateFeb 15, 2011
Priority date
Expiry dateOct 4, 2029

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/1044
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Methods and apparatus dynamically reconfigure storage or channel capacities in a memory system. A fully-buffered dual in-line memory module (DIMM) is configured for a particular storage capacity and a particular channel capacity. An error may be detected at a memory address in some portion of the DIMM. To resolve the problem, the storage capacity or the channel capacity may be reduced and the DIMM may be dynamically reconfigured according to the reduced capacity. For one embodiment the DIMM may be reconfigured by mapping the portion of the DIMM containing the error as unavailable and taking that portion off-line without taking the entire DIMM off-line. For another embodiment the DIMM may be reconfigured by throttling the DIMM at a reduced frequency. The portion of the DIMM containing the error may be retested at the reduced frequency. If no errors are detected, the DIMM may be made available at the reduced frequency.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.