Built-in self-test using embedded memory and processor in an application specific integrated circuit
US7890828B2 · kind B2 · utility
5Cited by
23References
22Claims
0Family size
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Key dates
| Filing date | Aug 22, 2008 |
| Grant date | Feb 15, 2011 |
| Priority date | — |
| Expiry date | Aug 22, 2028 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/1816
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A test method for an ASIC uses an embedded processor in the ASIC to execute test routines from an embedded memory or an external memory. During ASIC production, the test routines can comprehensively test of the blocks of the ASIC without a complicated test pattern from test equipment. The test routines can also perform power-up tests in systems or end products containing the ASIC. Test selection, activation, and result output can be implement using a few terminals of the ASIC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.