Patent · US Active

Code optimization based on loop structures

US7890943B2 · kind B2 · utility

5Cited by

1References

11Claims

0Family size

Assignee

Intel Corporation · US

Inventors

Xiaofeng Guo · Shanghai, CN
Jinquan Dai · Shanghai, CN
Long Li · Shanghai, CN

Key dates

Filing date	Mar 30, 2007
Grant date	Feb 15, 2011
Priority date	—
Expiry date	Dec 15, 2029

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/526
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Instructions that have no dependence constraint between them and other instructions in a loop of a critical section may be moved out of the critical section so that the size of the critical section may be reduced. A flow graph of a program including the critical section may be generated, which includes loops. The flow graph may be transformed based on which any unnecessary instructions in loops may be moved out of the critical section. Subsequently, the original flow graph of the critical section may be recovered from the transformed flow graph.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.