Thyristor-based memory and its method of operation
US7893456B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2009 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Feb 9, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D18/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A thyristor-based memory may comprise a thyristor accessible via an access transistor. A temperature dependent bias may be applied to at least one of a supporting substrate and an electrode capacitively-coupled to a base region of the thyristor. The voltage level of the adaptive bias may change with respect to temperature and may influence and/or compensate an inherent bipolar gain of the thyristor in accordance with the change in bias and may enhance its performance and/or reliability over a range of operating temperature. In a particular embodiment, the thyristor may be formed in a layer of silicon of an SOI substrate and the adaptive bias coupled to a supporting substrate of the SOI structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.