Patent · US Active

Multiple input PLL with hitless switchover between non-integer related input frequencies

US7893736B2 · kind B2 · utility

9Cited by

9References

27Claims

0Family size

Assignee

Analog Devices, Inc. · US

Inventors

Wyn Palmer · North Andover, US
Kenny Gentile · Oak Ridge, US

Key dates

Filing date	Feb 13, 2009
Grant date	Feb 22, 2011
Priority date	—
Expiry date	Feb 13, 2029

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/22
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A multi-branch frequency translation system converts a plurality of independent input clocks to a common frequency. One of the converted clock signals is selected as a dominant clock. The remaining converted clock signals are edge-synchronized with the dominant clock. When the system selects another converted clock signal for use as the dominant clock, the newly selected signal already is edge-synchronized with the dominant clock and, therefore, switchover losses can be avoided. The dominant clock can be subject of further frequency translation processes and output from the system.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.