DAC variation-tracking calibration
US7893853B2 · kind B2 · utility
2Cited by
8References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2008 |
| Grant date | Feb 22, 2011 |
| Priority date | — |
| Expiry date | Jan 9, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1057
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method of calibrating a digital-to-analog converter (DAC) is provided. The DAC includes a least-significant bit (LSB) block, and dummy LSB block adjacent to the LSB block. The DAC has a most-significant bit (MSB) block, which includes MSB thermometer macros. The method includes measuring the dummy LSB block to obtain a dummy LSB sum; and calibrating the MSB block so that each of the MSB thermometer macros provides a substantially same current as the dummy LSB sum.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.